Phase detection is the process of measuring the phase difference between two oscillations. Most phase detectors encountered in common phase-locked loop (PLL) circuits are analog in nature and of limited dynamic range. These phase detectors, such as MC12040 offered by Motorola, are well known in the art. Generally, such phase detectors generate an output voltage indicative of the phase difference between two oscillations that are close in frequency. The polarity of the output voltage indicates which oscillation is leading the other. The magnitude of the output voltage tends to be proportional to the phase difference. Analog phase detectors are able to detect a fraction of a cycle and rapidly produce a usable (analog) output. However, the dynamic range of proportionality is typically limited to one cycle in each direction.
For telecommunication network synchronization, phase detection between an input reference signal and a local oscillator signal is required. Signal variations in these applications are slower. Analog phase measurement becomes a problem for very long time constants. Digital phase detection is preferred for phase detection of dynamic ranges wider than 1 or 2 cycles. Consequently, electronic counters are often used as phase detectors. The number of counts corresponds to the phase progression and the phase can be measured with much wider dynamic ranges. The resolution is 1 count or 1 cycle.
As shown in FIG. 1, Lesea disclosed in U.S. Pat. No. 4,947,382 a phase detector based on homodyning: detecting phase difference between two oscillations of the same nominal frequency. The phase detector includes two 16-bit-wide counters L28, L32. When the contents of counter L32 overflow, the contents of counter L28 are read by latch L34, producing the phase difference between the two oscillating signals. One phase difference value is generated every 65,536 counts of latch L34, at a 31 Hz rate, with a phase resolution of .+-.1 cycle, and a dynamic range of 65,566 cycles. The two signals have the same nominal frequency.
As shown in FIG. 2, Scordo described, in U.S. Pat. No. 4,633,193, another counter-based phase detector. The signals have different frequencies, but the moduli of the counters S400, S401 are adjusted to accommodate the frequency ratio by overflowing at the same nominal rates of 1 kHz. The system behaves as a homodyning system. The resolution of the example Ts=1 ms. The resolution is .+-.1 cycle at a rate of 1 kHz. The dynamic range is 2048 cycles.